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Running Theses

FPGA Prototyping of a Quantum Accelerator Model
 
Type: Hauptseminar Projektstudium
State: running
Supervisor: Ralf Ramsauer
Project: SysQC
Student: Lukas Landgraf
RISC-V Integration for FPGA-based Quantum Accelerator Model
 
Type: Master thesis
State: running
Supervisor: Ralf Ramsauer
Project: SysQC
Student: Saifuldeen Al-Rifaie
Systems Architecture and Interface Design for Quantum-Classical Integration
 
Type: Master thesis
State: running
Supervisor: Ralf Ramsauer
Project: SysQC
Student: Lukas Landgraf