Offline Runtime Verification of Automotive ECUs via Hardware Trace

External thesis in cooperation with Aumovio.

Abstract

Electronic control unit control units (ECUs) sometimes exhibit timing-dependent faults that are difficult to reproduce and analyze. Conventional debugging techniques, such as breakpoints and single-stepping, can alter the timing behavior of the system and may prevent such faults from occurring, complicating root-cause analysis.

To address this challenge, this thesis presents an offline runtime verification framework based on non-intrusive hardware tracing. The approach leverages ARM CoreSight trace infrastructure to capture execution behavior without affecting the system's real-time behavior. Recorded instruction and data traces are replayed in an emulator-based analysis environment, enabling accurate reconstruction of program state and execution flow. To support automated verification, relevant runtime events are extracted during trace replay and evaluated against formal specifications expressed in TeSSLa, a stream-based runtime verification language.

Its applicability is demonstrated through a case study involving the detection of unprotected accesses to shared variables in an automotive ECU, which are often difficult to reproduce due to their timing-dependent nature. The results show that the proposed approach can automatically identify such faults without requiring intrusive debugging techniques or manual analysis.